1. Field of the Invention
The invention relates generally to semiconductor processing methods of forming and utilizing insulative materials for electrical isolation in integrated circuits, and more particularly to processes for increasing adhesion between polysilazane and silicon nitride.
2. Description of the Related Art
For the fabrication of semiconductor integrated circuits, semiconductor devices are integrated and laid out in a small area of a chip, thus requiring the devices to be placed in close proximity to each other. With the continued decrease in the dimensions and spacing of devices on integrated circuits (ICs), insulative materials are being deposited on ICs, to electrically isolate various active components, such as transistors, resistors and capacitors. Isolation insulative materials are typically made of silicon dioxide (SiO2).
For example, interlayer dielectric (ILD) or pre-metal dielectric (PMD) layers isolate structures from metal interconnect layers, which may require the filling in of narrow gaps having high aspect ratios (ratio of depth to width) of five or greater. Insulative structures, such as shallow trench isolation (STI) regions are formed in recesses (trenches) in the substrate between components. Such trenches can have a width as narrow as 0.01 to 0.05 microns or smaller, and the filling in of such narrow features can be difficult. In addition, the dielectric material must be able to withstand subsequent processing steps, such as etching and cleaning steps.
Dielectric materials are typically deposited by chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD). For example, in a typical STI method, a trench is etched into a silicon substrate, and the trench is filled by CVD of an oxide, such as silicon dioxide as a conformal layer. In the trenches, the conformal layers of oxide are initially formed on the sidewalls and grow in size outward into the center of the trench to where the oxide layers meet. With high aspect ratio features, the width of the trench have become narrower and the depth becomes much greater, such that it is difficult to form a void-free or seam-free gap fill using the standard CVD or PECVD techniques.
Flowable materials, such as spin-on dielectrics (SODs), spin-on glasses (SOGs), and spin-on polymers, such as silicates, siloxanes, silazanes or silisesquioxanes, have been developed that generally have good gap filling properties. A silicon oxide film is formed by spin-coating a liquid solution of the silicon-containing polymer onto a surface of a substrate, and then baking the material to remove the solvent, and then the polymer layer in an oxygen is thermally oxidized, or steamed, with an atmosphere of an elevated temperature of up to about 1000° C. An issue concerning current methods for forming a trench isolation is illustrated in accordance with FIG. 1. Referring to FIG. 1, a trench 104 is formed using a pad layer 108 on a substrate 102 as a mask. A polysilzane coating layer is coated onto the substrate 102 and into the trench 104, and then cured with containing oxygen (O2) ambient at high temperature to form a silicon oxide layer 110 in the trench 104. In the current methods, in order to avoid consumption of the substrate 102 due to reaction with O2 and/or H2O during the oxidization process of the polysilazane coating layer, a silicon nitride liner layer 106 is required. However, divots 112 are formed during subsequent deglassing, or wet etch back processes post CMP because the polysilazane coating layer has bad adhesion with the underlying silicon nitride liner layer 106. Consequently, a method for increasing adhesion between polysilazane and silicon nitride is required.